Instruction set architecture

A CPU does not understand Python or JavaScript. It understands a fixed list of very small commands: add these two numbers, load this value from memory, jump to that step if the result was zero. That list, plus the rules for how each command is encoded in bits, which registers exist and how memory is addressed, is the instruction set architecture, or ISA. It is a contract: software compiled for an ISA runs on any chip that implements it, whoever made the chip and however it works inside.

Three ISAs matter today. x86 (in its 64-bit form, x86-64) comes from Intel and AMD and has run most PCs and servers since the 1980s; it carries decades of backward compatibility and complex, variable-length instructions, a style called CISC. The ARM architecture follows the RISC idea: fewer, simpler, fixed-size instructions that are easier to execute efficiently. Arm licenses it, and it powers nearly every phone, Apple silicon Macs and a growing share of cloud servers. RISC-V is a newer RISC design that is an open standard: anyone can build a chip with it without paying a license, which has made it popular in microcontrollers, research and countries seeking independence from foreign IP.

The ISA is why a program is "for" a platform. An app compiled for x86 cannot run directly on an ARM chip; it has to be recompiled, or translated on the fly by something like Apple's Rosetta 2, at some cost. The old idea that RISC means efficient and CISC means fast has blurred: modern x86 chips translate their instructions into simpler internal ones, and modern ARM chips are very fast. Today the differences come more from the specific chip design, the manufacturing process and the software ecosystem than from the ISA alone.